What MIPS registers bound the local variable storage area for a subroutine? (103)

The stack pointer and the frame pointer.

What is the job of an assembler (15)

Translate assembly code into machine language

In multimedia arithmetic, an overflow often results in (181)

Achieving a maximum value, but no greater

Which is not a difference between the MIPS and ARM processor (146)

The year of first product announcement

An embedded computer is distinguished from other types of computers by the fact that it (6)

Primarily runs a single, predetermined application

The C code "d = a - e" could be represented in MIPS assembly as (65)

sub $t0, $t2, $t1 #where d=$t0, a=$t1 and e=$t2, sub $t0, $t1, $t2 #where d=$t0, a=$t1 and e=$t2

What is the fastest way of saving a variable in the $a0 register (138)

Add it to $0 and store it in another register.

The two operands of the division process are (189)

Can be stored in conventional registers

Processing data for multimedia, especially graphics, has led to (181)

Long registers with carry partitions

Normalized scientific notation (196)

Means the number left of the point is not zero

The execution time of a program is related to (35)

Number of instructions times the average CPI for the program

In determining the sign of the quotient, what rule must always hold? (193)

Dividend = Quotient * Divisor + Remainder

Why do the addresses of integers stored in main memory need the last two bits set to 0? (69)

There is an alignment restriction

How can a CPI of less than 1.0 be achieved? (39)

Issuing multiple instructions per clock cycle

Immediate operands are (72)

Data located in the instruction itself

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Assembly Midterm

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Questions 264

Answers

1
Instructions * CPI / GHz is (35)
The number of instructions executed
Run time in nanoseconds
Average CPI
Run time in seconds
2
Which instruction calculates an address with the ALU and then uses that address in main memory?
ADDI
LW
SLT
BEQ
3
What MIPS registers bound the local variable storage area for a subroutine? (103)
The frame pointer and the global pointer.
$ra and $sp
The stack pointer and the return address.
The stack pointer and the frame pointer.
4
The J-type instruction has an immediate field which is ____ bits long (113)
5
6
26
16
5
The J instruction immediate field is _____ bits. (113)
28
15
16
26
6
What is the job of an assembler (15)
Translate source code in to assembly code
Run assembly code
Translate assembly code into machine language
Link together code modules into a single executable module
7
Which device determines which instruction to read next? (253)
The instruction Multiplexer
The control unit
The Write-back logic
The PC
8
In multimedia arithmetic, an overflow often results in (181)
an exception
a black screen
Achieving a maximum value, but no greater
a blue screen
9
Which instruction has a 26-bit immediate field? (270)
ADDI
J
BEQ
ADD
10
The jal instruction is unique because it also (97)
Writes to the $ra register
Does not update the program counter
Resets the $pc register
Always executes (i.e., it is not conditional)
11
The most common use of processor arithmetic is for (184)
Address calculations
graphics calculations
calculating loop variables
floating point multiplies
12
MIPS conditional branch instructions require the comparison of (90)
rs and rd
rs and rt
One register to zero
rt and rd
13
The vocabulary of the CPU is the (62)
Architecture
Instruction Set
Datapath
Programs
14
When binary floating point numbers are multiplied, what does not happen? (206)
Exponents are made equal
The result is normalized
Fractional parts are multiplied
The result is rounded
15
The iPad processor is the (21)
ARM A5
Intel Xeon
Core i7
AMD Barcelona
16
The average number of clock cycles per instruction (CPI) in a program is an integer value
True
False
17
The 64-bit ARM v8 is an extension of the design of the 32-bit ARM v7. (159)
true
false
18
Which is not a length of floating point data? (221)
8 bits
64 bits
32 bits
16 bits
19
Which is not a difference between the MIPS and ARM processor (146)
The number of data addressing modes
The number of registers
The year of first product announcement
The use of the zero register
20
What do we call the binary representation of machine instructions? (14)
Source Code
Bytes
Assembly Language
Machine Language
21
The length of the product of an m-bit multiplicand and an n-bit multiplier is without sign bit
64 bits
2n bits
up to m + n bits
2m bits
22
Which is not a type of MIPS instruction? (113)
I-type
R-type
J-type
B-Type
23
Compilers need no assistance optimizing vector code for routines like matrix multiply (227)
T
F
24
An embedded computer is distinguished from other types of computers by the fact that it (6)
Is built into an incredibly small space
Primarily runs a single, predetermined application
Must survive harsh operating conditions
Has strict power requirements
25
The C code "d = a - e" could be represented in MIPS assembly as (65)
sub $t0, $t2, $t1 #where d=$t0, a=$t1 and e=$t2
sub $t0, $t1, $t2 #where d=$t0, a=$t1 and e=$t2
SUB d, e, a
SUB a, e, d
26
What is the fastest way of saving a variable in the $a0 register (138)
Push it onto the stack
Use the $at register.
Write it to disk
Add it to $0 and store it in another register.
27
Adjusting exponents and adding fractional parts describes (202)
Integer multiplication
Floating point multiplication
Floating point addition
Integer addition
28
The notion that integrated circuit resources double every 18-24 months is known as (11)
Amdahl's Law
Moore's Law
Boyle's Law
Ohm's Law
29
The two operands of the division process are (189)
Can be stored in conventional registers
The quotient and the dividend
The quotient and the remainder
The dividend and the remainder
30
Which instruction does the MIPS processor not have? (87)
Shift Left Logical (SLL)
ADD
SUBI
ADDI
31
Which has the least lines of code? (226)
Optimized DGEMM written in conventional X86 assembly
Optimized DGEMM written in conventional AVX assembly
Unoptimized DGEMM written in C
Optimized DGEMM written in C
32
Which MIPS registers should not be used by the programmer? (105)
$ra
$v0, $v1
$sp
$at
33
Processing data for multimedia, especially graphics, has led to (181)
quad-precision floating-point instructions
wider cache buses
Long registers with carry partitions
three-color processors
34
Normalized scientific notation (196)
Is widely used in integer calculations
Makes it difficult to multiply numbers
Applies to binary but not decimal numbers
Means the number left of the point is not zero
35
When MIPS detects an overflow condition a(n) _____ occurs (180)
dump
halt
exception
branch
36
Which instruction is commonly used for a subroutine call? (96)
j
jr $ra
call
jump and link (jal)
37
What is the input to the Java Virtual Machine (131)
Java source code
Dynamically linked libraries
MSIL
Java bytecode
38
The execution time of a program is related to (35)
The number of instructions times the clock speed
Number of instructions times the average CPI for the program
The number of instructions divided by the clock speed
The average CPI times the clock speed
39
A conditional branch is appropriate for (92)
A subroutine call
A loop
Termination of a program
Jumping to a new location
40
In determining the sign of the quotient, what rule must always hold? (193)
The remainder is always positive
Dividend = Quotient * Divisor + Remainder
Sign of Remainder = sign of quotient
The remainder's sign bit = XOR of the operands' sign bits
41
Early microprocessors which disappeared from the market did so because (158)
Insufficient address bits
They were too expensive.
Unreliable performance
Slow clock speeds
42
The length of a single-precision floating point binary number is ____ bits (200)
128
32
64
16
43
Negative exponents in floating point binary are represented as twos-complement numbers (200)
F
T
44
Which is not a field in the MIPS instruction format? (88)
precision
shamt
op
rt
45
Besides cost, what is important in selecting a computer for a particular application? (29)
Limitations in performance
Range of power supply voltages the machine will tolerate
The speed of the network card
The size of the screen
46
Why do the addresses of integers stored in main memory need the last two bits set to 0? (69)
The cache can operate more efficiently
The data bus is only 30 bits wide
Data can be located anywhere in memory
There is an alignment restriction
47
Adding sign-extended, shifted-left-2 immediate data to the program counter is done in the
BEQ instrustion
JAL instruction
ADDI instruction
J instruction
48
To adjust the stack pointer to make room for three 32-bit values,the correct instruction is(99)
addi $sp, $sp, 0xc
addi $sp, $sp, 0xfff4
addi $sp, $sp, 12
addi $sp, $sp, -3
49
The first step in adding two floating point numbers is (205)
Make the exponents equal
Make the fractional parts equal
Express the numbers in binary fractions
Compare the signs
50
How can a CPI of less than 1.0 be achieved? (39)
Executing fewer instructions
Shorter instructions
Issuing multiple instructions per clock cycle
Faster clock cycle time
51
Immediate operands are (72)
Data located in registers
Data located in main memory
Data located in the instruction itself
Data located in cache
52
Two methods of indexing lists of numbers are (141)
Tables and arrays
Increments and decrements.
Arrays and pointers
. in-order and out-of-order
53
Which describe two steps in the chip fabrication process? (26)
Slicing and dicing
Testing and resting
Slipping and shipping
Waxing and faxing
54
An invalid mathematical operation which can happen when computers do calculations is (189)
Adding zero
Arithmetic overflow
Multiplying by zero
Adding zero to a negative number
55
Normalization is (205)
Setting the exponents so they are equal
Adjusting the exponent so that the number is >=1 and
Converting the number from binary to hexadecimal
The same as rounding
56
Which is the fastest way to convert an array index to a memory address location (144)
shift left 2 in hardware
shift left 2 in software
Shift right in hardware.
successive adds of four
57
What operation wound combine 0x80000000 with 0xC0000000 to produce 0x40000000? (89)
XOR
NOR
NAND
XAND
58
Which instruction field is 6-bits long? (82)
Op Code
Imm
Rs
Rt
59
In general, a more complex instruction set means (148)
Faster execution time
More compact code
Lower cycles per instruction
Shorter clock cycles
60
How many Branch instructions does the MIPS processor recognize? (90)
One (BRN)
Two (BNE, BEQ)
Four (BNE, BEQ, BEZ, BNZ)
Three (BNE, BEQ, BEZ)
61
If machines run the same program with the same CPI, what does execution time depend on? (38)
Clock Cycle Time
Cache
Number of Memory Accesses
The Paging Algorithm
62
Subword parallelism is another name for what happens in (222)
SIMD
Unsigned addition
Floating point multiply
Simultaneous Multi-Threading
63
If one subroutine calls another, we must at least preserve (138)
The $sp register
The return address register
The frame pointer.
The $s registers
64
A floating point number is composed of (197)
Exponent, Fraction, Logarithm
Sign, Extent
1 bit for the sign 8 for the exponent & 23 for the fraction
Sign, Characteristic, Mantissa
65
Which is an example of improving bandwidth? (30)
Faster cash registers in the cashier lanes
More streamlined procedures for cashiers in the food court
Moving dorms closer class so students can get there faster
More open cashier lanes in the food court
66
An increase in which of the following has the greatest effect on CPU power consumption (41)
CPI
Switching Frequency
Voltage
Capacitive Load
67
Energy efficiency can be an important performance goal (50)
False
True
68
Which is not one of the five classic components of a computer (17)
Memory
Display
Datapath
Control
69
Intel's widest register is ____ bits wide (152)
32
512
256
128
70
Inlining saves (138)
The overhead of a procedure call
Programmers from themselves
Space on the heap.
variables onto the stack.
71
Idling computers consume a tiny fraction of the power they use at full load (50)
True
False
72
The chip fabrication process begins with (26)
An Ingot
A Wafer
A Die
A Package
73
In MIPS, data is moved to and from memory using (68)
R-type add and subtract instructions
I-type add and subtract instructions
Branch instructions
Load and Store instructions
74
Unlike in mathematics, floating point addition is not associative (229)
T
F
75
If by mistake you divide a positive number by a negative number using unsigned divide
The quotient is zero and the remainder is the divisor
The remainder is the dividend
The remainder will be zero
An exception occurs
76
Multiplying two 32 bit numbers (184)
Can overflow a 64-bit register
Can result in a 64-bit product
Must be 64 bits long
Cannot overflow a 32-bit register
77
MMX and SSE (224)
Add about 150 instructions to the x-86 instruction set
Are MIPS multi-media instruction extensions
Add about 100 instructions to the ARM instruction set
Are Intel multi-media instruction extensions
78
The sign of an integer divide is (192)
The NOR of the dividend and divisor signs
The XOR of the dividend and divisor signs
he OR of the dividend and divisor signs
The AND of the dividend and divisor signs
79
The shamt field in the MIPS instruction is use for which instruction? (88)
SLL
XOR
SLT
SLLI
80
In the last 30 years, tech. revolutions begun by a new computer design were cut short by (3)
Foreign Competition
Presidential Decree
Laws
Even Faster Computers
81
Intel's instruction set is characterized by (149)
Reverse engineering.
Regularity.
Backward compatibility.
Simplicity.
82
Some character sets use 16-bit characters. The would be loaded by which MIPS command? (110)
LB
LBU
LW
LHU
83
You can calculate execution time by the formula (34)
Instructions / (CPI Clock speed)
Instructions x CPI * Clock speed
Instructions / CPI / Clock speed
Instructions x CPI / Clock speed
84
Another name for the fractional part of a floating point number is the (204)
Exponent
Numerator
Significand
Denominator
85
The market in which Intel processors do not do well is (158)
Web servers
Laptops
Servers
Cell phones
86
Only theoretical mathematicians care about floating point accuracy. (231)
T
F
87
A branch instruction is a(n) ____ instruction (113)
B-Type
K-Type
I-type
R-type
88
Cycles Per Instruction (CPI) must be an integer value (35)
True
False
89
Each time the cost of computing goes down (4)
It's more difficult for hackers to create effective exploits
New opportunities put processors into new areas of life.
The cost of big IT project failure goes up.
The risks associated with processor failure increase.
90
Which spreadsheet tools can read this sheet and export to xlsx format?
LibreOffice
Excel
Numbers
Google Docs
91
Inside the CPU, what activity does the datapath perform? (19)
Arithmetic operations
Translates assembly instructions into binary code
Moves data to and from the central processor
Tells the memory what to do
92
Alongside the computer revolution is the ______ revolution (4)
Electrical
Leisure
Information
Travel
93
Which has the least influence on the performance of a computer running a program? (10)
The Power Supply Wattage
The Algorithm Chosen
The Processor
The I/O System and Devices
94
Understanding the hardware layer (8)
Makes you a Better Programmer
Is the Key to an Early Retirement
Provides for a Steady Income
Builds Character
95
When does combinational logic happen? (249)
During instruction Fetch
Between the rising edges of two adjacent clock pulses
During Data Write
After Instruction Fetch and before Instruction Decode
96
Machine Code optimized for speed has the fewest instructions (140)
true
false
97
A disadvantage of recursion is that it can consume a lot of (104)
Memory on the stack.
Registers
Execution cycles
Heap memory
98
Which number below is the hex representation of a negative floating point number? (202)
0x08010000
0x20400000
0xC0100000
0x10800000
99
The contents of a memory in register $s1 may be expressed as: (64)
4($s1)
Regs[$s1]
Mem[$s1]
Mem[Regs[$s1]]
100
The concept of cloud computing is most closely associated with (7)
Transaction Processing
Warehouse Scale Computing
Personal Mobile Devices
Vague Computing
101
Which is not used in the execution of a BEQ instruction? (254)
ALU
Data memory
Register file
Sign extender
102
How many five-bit inputs does the Register File have (253)
Three
Five
Four
Two
103
Which of the following is a pseudoinstruction? (137)
addi
lgb
add
move
104
In binary, subtracting a large positive number from a small positive number produces (75)
An underflow condition
An overflow condition
A one in the left bit of the result
A zero in the leftmost bit of the result
105
How is multiply overflow handled in MIPS? (188)
The EPC register contains the result of the overflow
The sign-bit logic prevents overflow
Software must check the hi half of the product
It triggers an exception
106
The problem with one's-complement representation of negative numbers was (79)
It confused the programmers
There were more positive numbers than negative
There is no such thing as one's complement
It was more difficult to implement than twos-complement
107
The total time required for a computer to complete a task, including overhead is called (29)
Absolute Time
Application Time
Execution Time
CPU Time
108
Twos-complement is a method of (182)
Adding logarithms
Multiplying numbers
Performing addition
Expressing negative numbers
109
Which of the following types of memory is nonvolatile? (23)
DRAM
SRAM
Flash
DIMM
110
In the instruction "add $s0, $s1, $s2", $s1 and $s2 are (67)
Memory Locations
Immediate Values
Operands
Outputs
111
The advantage of capacitive sensing is that (19)
It requires less power than other types of touch screens
It allows multiple touches to be detected at the same time
It can more precisely locate the point of touch
It allows you to point with toes as well as your fingers
112
the NaN notion can result from (199)
Subtracting two numbers which are nearly the same
Incorrect use of associativity
A sign miscompare
Performing an operation with a NaN value
113
The main reason for the shift from uniprocessors to multi-core processors was (40)
The Power Wall
The Internet
Personal Mobile Devices
iPhones and iPads
114
Memory alignment means (69)
More than one word can be read from memory at once
The bottom two bits of a MIPS instruction address must be 0
Dynamic RAM is faster than Static RAM
Similar data items are placed next to each other in memory
115
In a 32-bit MIPS instruction, the location of bit 0 (the least significant bit) (74)
Varies by memory manufacturer
Depends on the instruction
Is on the left
Is on the right
116
Twos complement is (179)
A way of adding positive numbers
A way of representing negative numbers
A way of preventing overflow
A way to speed up multiplication.
117
The most popular instruction set for embedded devices is the _____ ISA (146)
Motorola
Acorn RISC Machine
MIPS
Verilog
118
The typical MIPS immediate instruction (e.g., ADDI, SUBI) references how many registers? (72)
Three
Five
Two
Four
119
The Arithmetic Logic Unit is not used for which set of instructions (246)
Store (SW, SH, SB)
Load (LW, LH, LB)
J-types
Branch (BEQ, BNE)
120
Which memory is non-volatile? (23)
Main Memory
ROM
SRAM
Cache
121
Intel's 1978 microprocessor, the 8086 had a 16-bit architecture with (150)
A hardware stack.
Fewer registers than are common now.
An accumulator.
A single 16-bit register
122
Yield is primarily affected by (28)
Etching Chemistry
N and P Doping
Transistor Size
Wafer Defects
123
To get a better picture of CPU performance (47)
Tests are run multiple times
Industry has standards for honesty and integrity in testing
Customers are allowed to assess CPU performance on their own
A suite of benchmark programs is used
124
When a program is loaded into memory, the text segment (104)
Contains the MIPS machine code
Holds the program's source code
Contains the MIPS machine code
Contains the word processor data for the text editor.
125
Which is not an element of the MIPS CPU (246)
Arithmetic Logic Unit
Program Counter
Flash memory
Register File
126
The primary technology used in fabricating computer chips is (41)
NAND-flash
Tunneling
Complementary Metal Oxide Semiconductor (CMOS)
3D printing
127
If subroutine A calls subroutine B (100)
Subroutine A is a leaf routine.
Subroutine A is a non-leaf subroutine.
Subroutine A must preserve $ra.
Subroutine B must preserve $ra.
128
In MIPS Assembly Language, which is the instruction for a single-precision operation? (212)
muls
mul.s
adds
smul
129
What is the generic name of instructions which move data between the processor and memory? (68)
Arithmetic instructions
Memory Control
Branch instructions
Data transfer instructions
130
The chip manufacturing process begins with (26)
Checking the wafer for defects
Photolithography
Slices of silicon about 0.1" thick
A silicon ingot
131
Which is not a feature of the MIPS processor? (244)
The set arithmetic instructions are simple building-blocks
The only memory accesses are the load and store instructions
There are only two conditional branch instructions
Complex instructions are longer than simpler instructions
132
The reason the "ugly" Intel architecture has survived over the years is that (157)
Intel successfully lobbied for congressional support.
It followed IBM's market strategy.
It has huge market forces behind it.
It is not backward compatible.
133
Which action does a MIPS branch instruction not do? (254)
Sign extend the immediate data
Shift the immediate data left two bits
Write to the register file
Subtract the contents of one register from another
134
Applications running on servers are particularly sensitive to (32)
Cache Memory
The Amount of Main Memory
I/O Time
Disk Performance
135
What is the job of an assembler? (15)
Translates assembly instructions into machine instructions
It executes machine instructions
It translates source code into byte code
It optimizes loop structures
136
While the C language is compiled and linked, the Java language is __________ (145)
Executed
Parsed
Linked
Compiled and Interpreted
137
AVX is (225)
Intel's Advanced Vector Extensions
Addition and Vector multiplication
AMD's improvement on Intel's SIMD instructions
Capable of performing 2 double-precision operations at once
138
Storage and use of decimal numbers for computation in computers is (107)
Sometimes useful in financial applications.
Becoming more likely with the advent of multicore processors
Never used anymore.
Unpopular because the standards are complicated.
139
Execution time is the only valid measure of performance (52)
False
True
140
The abstract interface between the hardware and the lowest level of software is called the (22)
Application programming interface
Instruction set architecture
Machine design specification
Operating system
141
Because binary representation involves only 0's and 1's, carrying in addition is unnecessary.
T
F
142
The length of a double-precision floating point binary number is ____ bits (200)
64
128
32
16
143
Which is not a step in multiplying two floating point numbers? (209)
Multiplying the fractional parts
Aligning the exponents
Rounding
Normalizing
144
MIPS supports single-precision floating point, but not double-precision floating point (211)
F
T
145
The iPad accelerometer and gyroscope (20)
Provide three-axis information to the CPU
Sense six degree-of-freedom motion
Significantly shorten battery life
Were originally in the iPad design but are now of little use
146
Which is not in the hierarchical layers of a system? (13)
Applications Software
I/O Software
Hardware
Systems Software
147
In binary, 1011 - 100 = (179)
1010
1100
11
0x7
148
Which is the most complex operation for floating point calculations?
Subtraction
Division
Multiplication
Rounding
149
Which area of performance improvement is out of the scope of this course (9)
Memory Systems
The I/O System
Algorithms
Programming Languages
150
Double precision floating point numbers may not accurately represent decimal numbers (218)
T
F
151
To refer to each of the 32 MIPS processor registers, an instruction needs (83)
32 Bits
6 Bits
5 Bits
4 Bits
152
After an exception, the EPC register contains (182)
The location of the crash dump
The system exit instruction
the PC when the exception occurred
The reason why the exception occurred
153
Computers write numbers to memory differently than characters (178)
false
true
154
The time it takes a computer to complete a task is an example of (29)
Response Time
Bandwidth
Consistency
Clock Frequency
155
The principle of prediction is based on the idea that (12)
If you don't succeed at first, try, try again.
It is better to ask for forgiveness than ask for permission.
When the going gets tough, the tough get going.
You should eat dessert first.
156
The two parts of the integer division result are (189)
The dividend and the remainder
The dividend and the divisor
The quotient and the dividend
Stored in the HI and LO registers
157
In a recursive procedure (101)
$ra does not have to be preserved.
Local storage must be allocated on the stack.
JAL is never used.
$t register values must be preserved
158
Which language will have the most lines of code to implement a sort algorithm? (66)
C++
Assembly code
C#
Python
159
New instructions can be added to the instruction set without changing the compiler. (227)
F
T
160
Which results in better performance? (34)
Increased Instruction Count
Increased CPI
Decreased Clock Rate
Decreased CPI
161
Negative numbers can be represented in binary (75)
False
True
162
The MIPS J instruction uses ______ addressing (116)
Replace bottom 28 bits of PC
Register
Shift right two bits
PC-relative
163
One of Hennessey and Patterson's design rules is (46)
Make the instruction set as compact as possible
Get the product to market as soon as possible
Memory is cheap
Make the common case fast
164
The general name for the unit used to operate on or hold data within a processor is called a
Memory bank
Register
Pipeline stage
Datapath element
165
The standard for floating point notation is (198)
IEEE-754
NFPA-1002
ASA-400
ISO-9000
166
The difference between ASCII and Unicode is (109)
Unicode can represent more characters than ASCII.
ASCII is popular in foreign languages and Unicode is not
Apple only uses ASCII
Unicode is used by Java and ASCII is used by Microsoft.
167
Memory which retains its contents while powered off is called (22)
DRAM
SRAM
Volatile
Non-volatile
168
What is the output of a linker? (126)
The binary executable.
Java bytecode.
Assembly language instructions
Microsoft Intermediate Language.
169
In twos complement notation, the most negative value is (79)
0x0000
0x0001
0xfffe
0x8000
170
The MIPS and ARM instruction sets differ widely on how they perform (147)
Memory addressing.
Multiplication.
Register addressing.
Addition.
171
In binary, 1011 + 1 = (179)
0x1010
0x1100
0xC
11
172
The big problem with the switch to multi-processing is that (43)
Programmers have to think differently
Performance measures are very different
The chips are more difficult to manufacture
More heat-sinking is required
173
What is the primary difference between active matrix displays and liquid crystal displays? (17)
The LCD makes its own light.
The active matrix display consumes less power.
The active matrix display controls intensity of each pixel.
LCD pixels are more expensive than active matrix pixels.
174
To add two numbers, you would use what device? (252)
ALU
Branch control
Control Unit
Cache
175
The easiest conversion is from (82)
Hexadecimal to decimal
Binary to decimal
Decimal to Binary
Hexadecimal to binary
176
The compiler can affect CPI (39)
True
False
177
When floating point operations were introduced in the Intel processor line, (150)
They were not performed in the CPU itself.
The instruction length was increased to 32-bits.
Integer processing slowed down as a result
They did not affect the instruction set.
178
How many registers does a branch instruction read from the register file? (258)
Five
Two
Three
One
179
Which is not a characteristic of Dynamic Random Access Memory (DRAM) (20)
It takes very little power
It operates on a slower clock than the CPU
It is the most dense in terms of bits per area on a chip
It is one of the fastest types of random access memory
180
In single-precision binary floating point notation, the fraction is ______ bits long (198)
52
8
23
11
181
Which processor uses instructions which are of different lengths (155)
AMD
ARM
Samsung
MIPS
182
How many registers does an R-type instruction read from the register file? (258)
three-color processors
Five
Two
One
183
A terabyte is 2^___ bytes (5)
30
20
40
10
184
Using many adders to speed up division (194)
Works because fast multiplies can check the answe
Is difficult because the result is unknown
Works because of Moore's law
Won't work because decisions are made after the subtractions
185
Multiple SPEC ratios are combined using (47)
The Arithmetic Mean
Covariance
The Geometric Mean
Logarithms
186
The interface between low-level hardware and software is called (78)
The interpreter
Cache
The operating system
The instruction set architecture
187
Which describes a symbol table? (125)
The list of ASCII characters used in the program code.
A list of needed and supplied program locations.
A table that contains no information.
A list of all globally declared data in the program.
188
The role of the personal computer is now being replaced by the (7)
Personal Mobile Device
Super Computer
Cloud
Wearable Computer
189
Which signed number is the same as 0x80? (78)
0x80FFFFFF
0x7FFFFF80
0xff80
0xff08
190
The measure of the frequency of instructions of certain types across program(s) is the (39)
Instruction Mix
Average CPI
Program Count
Instruction Set Architecture
191
Which is not one of the eight great ideas in Computer Architecture? (11)
Reliability via Redundancy
Performance via Pipelining
Make the Common Case Fast
Fail Early
192
Machine A is 4x faster than machine B. B runs an app in 30 sec. How fast can A run it? (33)
7.5 sec
10 sec
90 sec
120 sec
193
Which kind of parallelism is not discussed in computer organization and architecture? (10)
Circuit-Level Parallelism
Thread-Level Parallelism
Data-Level Parallelism
Instruction-Level Parallelism
194
Instruction Set Architecture has to do with (22)
The size and shape of the computer
The layout of circuits on the CPU chip
The interface between the lowest level software and hardware
Die Yield
195
Addition can be speeded up by (182)
Performing add operations in parallel with more hardware
adding smaller numbers
widening the address bus
increasing the processor voltage
196
How many bits in a MIPS instruction are allocated for immediate data (84)
12
15
8
16
197
Which operation is unsupported in the ARM-7 instruction set? (146)
Divide
atomic swap
Shift right and left.
load halfword signed
198
Dynamically Linked Libraries (DLLs) (129)
. Are rarely used today because main memory is cheap.
Are not linked until runtime.
Tend to make programs take more space in memory
Were invented by IBM in the 1960s.
199
What is the output of a Java compiler (131)
A .jar file.0
Assembly instructions
Dynamically linked libraries
Java bytecode
200
In general, Intel's arithmetic instructions (152)
A source and destination register be the same.
Are a feat of modern engineering.
Are not backward compatible.
Execute faster than others'.
201
A major problem in measuring performance of a computer is (28)
It can be measured several ways
It is impossible to match conditions from run to run
Laughing at a English translation of the instruction manual
Variations in the manufacturing process
202
Which of the following indicators are inversely proportional to performance? (31)
Bandwidth
Instructions per second
Memory bits transferred per second
Execution time
203
Which signed byte has the smallest value? (95)
0x80
0x01
0x7f
0x0f
204
With the arrival of multimedia applications in the late 1990s, Intel introduced (150)
Special registers for audio and video data.
Micropipelining.
A brand new microarchitecture.
Single Instruction Multiple Data (SIMD) instructions.
205
Registers in the current Intel processors are the same length (153)
true
false
206
The EPC register is used for (182)
resuming a halted program
Storing the PC when an exception occurs
performing a crash dump
handling environmental protection faults
207
For a given method, which language will have the most lines of code?
Java
C/C++
Assembly
C#
208
A major difficulty in determining performance is that it (26)
Is largely independent of the processor itself
Can be affected by other components in the computer
Can be measured in different ways
Takes a long time to do accurately
209
What happens in edge-triggered clocking? (249)
The clock pulse starts on the falling edge
Combinational logic continues after the pulse
Instruction execution determines when the clock pulse starts
State is recorded on the rising edge
210
The fastest access to data is via (64)
Main Memory
Disk
Cache
Registers
211
Which is not a MIPS type of instruction? (82)
B
J
I
R
212
In which situation does an overflow occur? (180)
Adding a pos and neg # and getting a pos result.
Adding two positive numbers and getting a negative result.
Adding two negative numbers and getting a negative result.
Adding a pos and neg # and getting a neg result.
213
What is not an advantage of high-level code (16)
It is closer to natural language
It improves programmer productivity
It allows machine independence
It produces the most compact run-time code
214
Most liquid crystal displays (LCDs) now rely on ______ technology (18)
Active Matrix
Advanced Module
Faster Raster
Amplitude Modulation
215
The MIPS instruction set has many more data addressing modes than the ARM set. (147)
true
false
216
Which register is used in allocation of memory on the heap? (104)
$gp
The global pointer
$fp
$sp
217
Two important laws in computer performance are (19)
Moore's and Amdahl's
Amdahl's and Planck's
Ampere's and Ohm's
Moore's and Ampere's
218
Which is not a MIPS design principle? (161)
Smaller is faster.
Simplicity favors regularity.
Good design demands good compromises.
Speed = Efficiency.
219
The ALU zero output is used in handling which instruction? (256)
BNE
JAL
SLT
ADD
220
Which of the following does not result in performance gains? (45)
Prediction
Memory Hierarchies
Pipelining
Higher Voltage Requirements
221
On which of the following does execution time not depend? (34)
Clock Cycle Time
Number of Instructions Executed
Amount of System Memory
Average Cycles per Instruction
222
To create all conditions for branches, MIPS uses which set of instructions? (93)
blt, bgt, lgbt
sll, srl, beq, bne, and the $zero register
The $0 register, slt/slti and bne/beq
j, jne, jeq, jal and the $zero register
223
The CPU time spent in the O.S. performing tasks on behalf of a program is called (32)
Wasted Time
User CPU Time
System CPU Time
Execution Time
224
What best describes what a linker does? (124)
Ensures instructions are on 4-byte boundaries.
Calculates load parameters for the program.
Resolves references among separate code modules.
Compresses executable code size.
225
Which 16-bit hex value would represent a negative number? (74)
0x100f
0x7777
0x8001
0x0001
226
Current IEEE 802.11 wireless technology allows for data transfer rates of up to (24)
100 gigabits per second
1 megabit per second
1 gigabit per second
10 megabits per second
227
In a 32-bit register, overflow can occur when adding a positive and negative number (179)
F
T
228
To move a unicode character from memory to a register, which MIPS instruction should be used?
lhu
lb
lw
lh
229
What is the native, binary form of instructions used by the processor? (81)
Machine instructions
Byte Code
Assembly language
Intermediate Language
230
In single-precision binary floating point notation, the exponent is ______ bits long (198)
23
Eight
52
11
231
MUX is the abbreviation for which device? (247)
Multiplexer
Memory storage
Multiplier
Memory access
232
What is the vocabulary of commands understood by the processor? (62)
The instruction set
The assembly language
The intermediate code
The byte code
233
The Intel instruction set has special instructions for string move and string compare (154)
false
true
234
ARMS processors can load blocks of memory into multiple registers with one instruction (148)
true
false
235
Moore's Law (11)
Expects chip capacity to change about every two years
Says to optimize tasks that are frequently performed
Underscores the importance of parallelism
Says performance improvements are limited by the problem
236
A key to the future of computation is (43)
Creating lower-power processors
Making computer science courses harder
Doubling the size of computer science programs
Understanding parallelism
237
Integer addition and subtraction use the same add-and-carry logic in the CPU. (178)
false
true
238
Which is not a factor in CPU power consumption? (41)
Capacitive Load
Instruction Length
Switching Frequency
Supply Voltage
239
Which set of binary numbers are the two's complement of each other? (76)
00000011 11111100
00000000 11111111
00000001 00000000
00000001 11111111
240
The BEQ and BNE instructions are (90)
Not Jumps
Labels
Unconditional Branches
Offsets
241
Which instruction is commonly used for a subroutine call? (96)
jal
beq
bne
jr $ra
242
A sequence of instructions without branches in the middle is call a(n) (93)
Basic Code Block
Subroutine
Code Segment
Text
243
Adding more cores to a processor will not improve performance if (49)
Program execution speed depends on the clock frequency
More cores means more power consumption
The cores are all the same size
No part of the program can be done in parallel with another
244
Performance is inversely proportional to execution time (30)
False
True
245
The info. tech. industry accounts for about __ of the U.S.A.'s gross national product (3)
60
50
30
10
246
Performance and execution time are (30)
Exponentially Related
Inversely Related
The Same Thing
Proportionally Related
247
All MIPS instructions have (81)
Length of 32 bits
Immediate data
Embedded memory addresses
A function code
248
A large number (more than 200) instructions were added to the intel instruction set (150)
Because of the demand for audio and video processing
In 1985 with the first 16-bit processor
In 1978 when the 8080 first went to market
In 2006 when silicon prices dropped.
249
A simple and efficient way to implement division is to (189)
Group bits into fours and perform hexadecimal division
use hardware to perform "grammar school" division
Run multiply hardware with reversed voltages
Look up the answers in a division table
250
The rectangular area on a wafer containing the circuitry for a single chip is a(n) (27)
Die
Imprint
Module
Mask
251
Faster multipliers (188)
Perform shifts and adds sequentially
Work better with smaller numbers
Use much higher clock speeds
Are easier to implement than faster dividers
252
Which is not a "great idea" in computer architecture? (12)
Branch Prediction
Flash Cache
Memory Hierarchy
Pipelining
253
Parallel execution strategies which work for integer types also work for floating point types
T
F
254
Each ARM instruction begins with _____ (147)
A valid bit.
Condition codes
Bits that tell the length of the instruction.
An indication of how long it is.
255
The percentage of good dies on a wafer is called (27)
The Beneficial Margin
The Yield
Profit
The Success Rate
256
Which device accepts 16-bit immediate data and produces a 32-bit output? (255)
Sign Extender
Register file
The hazard detector
Program Counter
257
The LW instruction requires that ___ register(s) be read. (245)
Two
One
Zero
Three
258
ARM's NEON extensions (223)
Support 64-bit floating point numbers
Provide multimedia support
Provide simultaneous multithreading support
Support quad-precision calculations
259
SPEC benchmarks are (46)
A brand new way to measure performance
Unreliable because testers cheat
A long-standing set of standard test programs
Obsolete because of recent innovations in chip design
260
If four-byte alignment is required, at which address could an integer not be stored? (70)
0x00123454
0x0041791C
0x00ABFEDC
0x0041000E
261
In binary, 1111...10001 - 1111...11000 = (180)
1000...01001
1111...11000
0000...01000
0xfffffff9
262
CPU A has a CPI of 3 and CPU B has a CPI of 2. What is the performance difference? (38)
1.5
0.33
0.67
It cannot be determined
263
Silicon is a (25)
Insulator
Semiconductor
Conductor
Transductor
264
A problem with flash memory is that (23)
The number of writes are limited
It loses its memory when power is turned off
It is cheaper but slower than magnetic media
The bits are easy to write but difficult to read