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Processor and architecture
Processor and architecture
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1
At what point does a branch predictor predict branches ?
Link time
Runtime
Tea time
Compile time
2
Intel processors use what type of architectures ?
CISC
RISC
GPU
ARM
3
In perfect condition, hardware pipeline achieves:
Over 9000 instructions per cycle
1 instruction every 2 cycles
1 instruction per cycle
2 instruction per cycle
4
On our of order processors, instructions are scheduled:
First in, forst out
Round robin
Statically
Dynamically
5
What design allows a CPU to start an instruction before the end of the previous ?
Pipelining
Caches
ALU
TLB
6
According to Amdahl's law, how much faster a program can go if we improve 50% of it ?
4 times
2 times
0.25
0.5
7
The algebra domain using only binary values was introduced by:
Charles Babbage
Edsger Dijkstra
George Boole
Alan Turing
8
In which type of notation are floating point values represented in binary ?
HTML
Classic notation
Two's complement
Scientific notation
9
Where is the cache memory generally integrated?
Into the RAM memory
In the BIOS
In the BUS
Into the CPU
10
What do we use translate code from a high-level programming language to assembly?
A compiler
A parser
An IDE
A Hex editor
11
What method is used to represent signed integers in binary on modern computers ?
Divide and conquer
One's complement
Flip Bits
Two's complement
12
Compared to the main memory, cache memory is ?
Bigger and faster
Faster and smaller
Bigger and slower
Smaller and slower
13
What is an advantage of RISC over CISC ?
Has a larger range of instructions
Optimismze the number of instructions per program
Faster instructions
Widely available for personal computers
14
In a Von Neumann architecture, what is contained in the memory?
DATA and instructions
DATA
Cache
Instructions
15
DRAM stores the information in:
Resistors
Capacitors
Transistors
Wires
16
According to Flynn's taxonomy, in which classification is a multi-core processor?
MIMD
SISD
SIMD
MISD
17
What type of RAM is generally used for the main memory ?
DRAM
RDM
EPROM
SRAM
18
What type of RAM is generally used for the cache memory
ROM
SRAM
EPROM
DRAM
19
ARM processors use what type of architecture ?
GPU
ARM
RISC
CISC
20
The 3 parts that compose a float in binary are the sign, the exponent and:
The sum
The comma
The mantissa
The opcode
21
What type of architecture is composed of an ALU, a control unit and a memory?
Gothic
Turing machine
Finite state machine
Vom Neumann
22
What are the theoretical elements of a Turing machine ?
LOAD, STORE, PUSH, PULL
An infinite tape, a reading/writing tape, a table of instructions
A list of states, with for each state an entry action and an exit action
A memory, a control unit and an arithmetic unit
23
What is an advantage of DRAM over SRAM ?
It's cheaper
Better bandwidth
It's faster
Lower latency
24
How does a program take advantage of the cache memory?
By reusing data
By spacing data in the memory
By unrolling loops
By doing memory
25
What instructions use different parts of modern CPU?
ADD/AND
ADD/SUB
LOAD/STORE
LOAD/ADD
26
(0,0) = 0, (0,1) = 1, (1,0) = 1, (1,1) = 0 is the truth table of:
NOT
AND
XOR
OR
27
How many transistors are required to build an AND gate ?
1
4
2
3
28
Which law states that the density of transistors doubles every 18 months ?
Amdahl's law
Moore's law
Murphy's law
Bell's law
29
What is assembly language ?
A symbolic representation of machine instructions
A high level programming language
A list of bits
An object oriented programming language
30
What are the basic steps to perform an instruction?
Add, transfert and save
Perform and print
Fetch, decode and execute
Loop, execute and jump
31
If the first bit of a floating point value in binary is 1, the value is:
Positive
Greater than 255
Negative
Lower than 255
32
What does the program counter register contain ?
The number of programs
The number of cycles
The return address
The address of the next instruction
33
How does a CPU achieve high performance parallelism ?
By having an extended set of instructions
By using a cache memory
By having a lot of simple cores performing the same operation at the same t
By having a higher frequency than the CPUs
34
Dependencies between instructions can create something in a pipeline, what is it ?
Bubbies
Core dump
Holes
Segmentation fault
35
Circuit used to store one but can be built with:
3 XOR gates
2 AND gates
2 NOR gates
1 AND gate
36
What are the basics operations in boolean logic ?
AND, OR, NOT
0 and 1
ADD, SUB, MUL
LOAD, STORE
37
How does a branch predictor improve the results ?
By using cache memory
By performing the same operation more frequently
By transgerring more data
By using pipeline