stud
bud
Sign up
Log in
Home
Library
Explore
SAT
More
Final review Flashcards | StudBud
Explore
/
Final review
Final review
70 terms
·
StudBud Administration
Imported from external platform
Flashcards
70 cards
F
Practice quiz
P
Host live
L
Questions
70
Answers
1
What is the difference between an interrupt and an exception?
Exceptions are from external events, interrupts come from within the CPU.
Interrupts and exceptions are identical events.
Interrupts are from external events; exceptions arise from internal errors
Interrupts occur during the fetch stage, exceptions occur during execution.
2
An ADC is used to convert analog signals from sensors into digital data that can be processed by a computer.
True
False
3
Which statement best describes the CPU’s behavior when an interrupt is signaled during instruction execution?
The CPU flushes the entire pipeline and then services the interrupt.
The CPU must complete the current stage before beginning interrupt
The CPU immediately stops mid-stage to service the interrupt
The CPU ignores the interrupt until the 5 stage execution is done
4
A digital-to-analog converter is used to convert the analog signal from a microphone into a digital file on a computer
False
True
5
Interrupt service routines are called explicitly from the main program executing.
False
True
6
Knowing that: t1(e = 6, p = 15), t2(e = 2, p = 5), t3 (e = 2, p = 8). Which task missed the deadline here?
t1
t3
t2
7
Which of these best describes SPI?
4-wire full-duplex protocol
3-wire half-duplex protocol
2-wire synchronous protocol
1-wire serial protocol
8
Assume a stepper motor is designed for 1.5-degree step angles. How many steps per revolution will it have
360
180
120
240
9
Which motor provides precise angular position control using feedback?
Brushed DC
Brushless DC
Servo motor
Induction
10
Which of the following transfer types allows data to be sent in both directions simultaneously?
Single-Direction
Half-Duplex
Simplex
Full-Duplex
11
Which communication methods is data sent one bit at a time, with a clock signal coordinating the timing of transmission?
Asynchronous communication
Bluetooth communication
Parallel communication
Synchronous communication
12
Which statement correctly compares NAND and NOR flash regarding read/write performance?
NOR flash is typically only used for bulk data writes.
NAND flash: fast random reads, NOR flash : slow random reads
NOR flash: fast random reads, NAND flash: slower random reads/faster writes
Both NAND and NOR flash have identical random read performance.
13
Which operator performs a
bitwise OR
, combining two values one bit at a time?
||
&&
&
|
14
What is
Secure Boot
primarily responsible for?
Managing user passwords
Handling file transfers
Speeding up startup
Ensuring only trusted code loads
15
What happens during a
context switch
in an operating system?
The CPU switches from running one program to another.
The program completes and the OS terminates it.
The CPU switches between processes or threads to allow multitasking.
The process is removed from memory.
16
A watchdog timer must be “kicked” (reset) periodically by the CPU code or it will reset the processor.
True
False
17
CAN bus is best described as:
A multi-master, differential, broadcast network
A point-to-point, half-duplex serial link
A USB-like host/device tree topology
A single-master, synchronous protocol
18
Which of the following is a key feature of an operating system?
It handles application logic.
It manages only memory and storage.
It provides a user interface and manages hardware resources.
It only manages processes.
19
Which motor advances in discrete, fixed‑angle increments without feedback?
Universal
Stepper motor
Servo
AC induction
20
Which of the following statements about flash memory is true?
It has limited write cycles, so wear leveling and buffering are used
It's write cycles can be increased by reducing the operating voltage
It is designed to be written only once
It has unlimited write cycles so no special techniques are needed
21
Which technique is used to manage the limited write cycles of flash memory?
Voltage scaling
Dynamic clock scaling
Wear leveling
Bit shifting
22
In an interrupt-driven system, the CPU checks the I/O status bits in a loop until the device is ready to be serviced.
True
False
23
Which of the following is NOT true about function pointers?
They store the memory address of a function with a matching signature.
They can be used to call a function indirectly.
They can only point to functions that return void.
They allow a function to be passed as a parameter.
24
Which C operator is the
dereference
operator, used to access the value at the address held by a pointer?
%
>>
*
&
25
Serial interfaces use fewer pins and wires than parallel interfaces.
False
True
26
If a program spends most of its execution time waiting for data from a hard drive, then it is considered CPU-bound.
False
True
27
Interrupt service routines should execute promptly and return so that they don’t block the main application.
False
True
28
What does the wdogcmp register hold?
Feed (kick) address
Current counter value
Compare/timeout threshold
Scale factor
29
What's the priority of interruptions A, B and C
A < C < B
A < B < C
A > B > C
B < C < A
30
Parallel communication is faster than serial communication because multiple bits are transmitted simultaneously.
False
True
31
Main difference between Rate Monotonic Scheduling (RMS) and Earliest Deadline First (EDF) in real-time operating systems
EDF only handles periodic tasks, RMS handles both periodic and aperiodic
RMS is for hard real-time systems, EDF for soft real-time systems.
RMS uses fixed priorities, EDF assigns priorities based on task deadlines
RMS assigns priority based on deadlines, while EDF uses task periods.
32
On the SiFive watchdog, which register must you write the magic key 0x51F15E into before touching any other WDT?
wdogkey
wdogfeed
wdogcfg
wdogcmp
33
Which scenario best justifies using a DAC instead of PWM?
Minimizing component cost
Driving a high‑torque motor efficiently
Implementing simple on/off control
Generating a noise‑free audio waveform
34
Bare metal execution is faster than OS-assisted execution(assuming similar hardware configurations).
False
True
35
Knowing that: t1(e = 6, p = 15), t2(e = 2, p = 5), t3 (e = 2, p = 8). Which task missed the deadline here?
t3
t2
t1
36
Which scenario best represents a CPU-bound process?
Transferring data over a network
Waiting for user input
Waiting for data from a hard drive
Continuously processing complex mathematical computations
37
Which statement best explains the difference between direct mode and vectored interrupts?
Direct is FIFO, while vectored is prioritized.
Direct is software-triggered, while vectored is hardware-triggered.
Direct requires polling, while vectored does not.
Direct uses one common handler; vectored jumps to specific handlers.
38
What is the primary function of a bootloader in embedded systems?
Manage power consumption
Initialize hardware and load the main app
Handle interrupts
Run user applications
39
SPI communication does
not
include explicit start or stop bits in its bus protocol.
True
False
40
You can do multi-threaded processes using bare metal systems.
True
False
41
What is something that is stored in memory,but not actively running and only exists as instructions to be executed later
A program
An interrupt
A thread
A process
42
In flash memory system, which of the following is NOT one of these techniques used to manage data and extend lifespan?
Data compression–reduce the volume of data by compressing it before storing
External data buffering–reduce number of write operations by buffering data
Wear leveling–ensure even distribution of write/erase cycles across memory
Frequency scaling–dynamically change the clock speed during operations
43
Which best describes an
open‑loop
control system?
Uses feedback to adjust output
Has no feedback mechanism
Only works with PWM
Requires a sensor
44
Which statement best describes a key requirement for an ISR (Interrup Service Routine)?
It must quickly handle events and return control to the main program.
It can ignore preserving register values.
It should perform lengthy computations.
It should disable all interrupts until complete.
45
What does PWM vary to control DC motor speed?
Amplitude
Duty cycle
Frequency
Phase
46
A
process
is essentially a program that is currently being executed and managed by the operating system.
True
False
47
Which flash technology is most commonly found in solid-state drives (SSDs) for data storage?
NAND flash
DRAM
NOR flash
EEPROM
48
Why is DRAM generally cheaper per bit than SRAM?
Uses only 1 transistor and 1 capacitor per cell
Uses more transistors per cell but simpler layout
Use 6 transistors but cheaper one
Has built-in sense amplifiers in each cell
49
Bare metal execution typically results in faster performance than OS-assisted execution(similar hardware configurations)
False
True
50
After any DRAM read, what must happen to the cell to preserve its data?
It must be inverted
It can be left as is
It must be restored/refreshed
It must be pre-charged
51
Knowing that: t1(e = 6, p = 15), t2(e = 2, p = 5), t3 (e = 2, p = 8). Which one show rate monotonic scheduling?
Graph A
Graph B
52
Temporal locality: If a program accesses a memory location, it is likely to access that same location again shortly.
False
True
53
After the processor asserts CS and WR, what does the ADC do once it completes conversion?
It asserts RD (read)
It resets its data lines
It asserts INTR (interrupt), signaling that data is ready to be read
It de-asserts CS
54
Which of the following best defines a
thread
in an operating system?
A process that is currently running on the CPU.
A set of instructions that exists in memory but is not currently executing.
A set of instructions that can be executed independently within a process
A single instruction being processed by the CPU.
55
The priority of jobs can dynamically change with an earliestdeadline first (EDF) scheduler
False
True
56
Main difference between Rate Monotonic Scheduling (RMS) and Earliest Deadline First (EDF) in real-time operating systems
RMS uses fixed priorities, EDF assigns priorities based on task deadlines
EDF only handles periodic tasks, RMS handles both periodic and aperiodic
RMS is for hard real-time systems, EDF for soft real-time systems.
RMS assigns priority based on deadlines, while EDF uses task periods.
57
Which of the following statement is true: If Liu and Layland bound <
the CPU utilization
< 1 ?
Both EDF and RMS can schedule the task set.
The task set is schedulable under RMS but not under EDF
The task set is unschedulable under both RMS and EDF.
The task set is schedulable under EDF but not under RMS
58
When you read a stored “1” from a DRAM cell, what happens to its capacitor?
Nothing happened
It overcharges
It fully discharges
It slightly discharges
59
Spatial locality: If a memory location is accessed, its neighboring locations are likely to be accessed soon.
False
True
60
A task set with CPU utilization greater than 1 is always schedulable under EDF but not RMS.
True
False
61
A
closed‑loop
control system relies on:
Pre-programmed steps
Feedback from a sensor
External clock
Manual calibration
62
The bootloader is compiled
independently
of the main application.
False
True
63
Which of the following best describes serial communication?
Data is transmitted over long distances using high-speed signals.
Data is transmitted without the use of a clock signal.
Data is transmitted simultaneously across multiple wires.
Data is transmitted one bit at a time, over a single wire.
64
For
RMS
, if the total CPU utilization < the Liu and Layland bound, the task set is guaranteed to be schedulable
False
True
65
When the processor detects that the ADC has signaled completion by asserting INTR, what does it do next?
It asserts the RD (read) signal to read data from D0–D7
It resets the ADC
It de-asserts CS and WR
It re-asserts CS to restart conversion
66
When the processor decides to read from the ADC, which signals must it assert(set to 0) to start the conversion process?
CS only
WR and RD
CS and WR
RD only
67
What does the term “volatile” mean in the context of memory?
It is used for permanent storage
It retains data when power is removed
It loses data when power is removed
It has unlimited write cycles
68
Asynchronous communication: data is transmitted without a clock signal and relying on start and stop bits
True
False
69
When the total CPU utilization is smaller than 1, which of the following can be said about
Earliest Deadline First (EDF)
EDF requires more resources than RMS
EDF cannot work if the utilization is below 50%
EDF can schedule the task set
EDF cannot schedule the task set
70
If wdogscale = 5 on a 32.768 kHz clock, approximately how often does the watchdog counter tick?
15.6 ms
976 µs
61 µs
31.2 ms
