Onboard Computers

5. The boot loader is a part of the application layer.

5. Drivers in the OBSW directly implement high-level mission algorithms

2. Which new memory technology combine the benefits of integrated circuits with the persistence of magnetic core memory?

2. What does MIL-STD-1553B primarily define?

5. Match:memorize

8. Purely procedure-oriented design methods are LEAST appropriate for OBSW coding in:

2. What is SpaceWire described as?

4. The OBC must be electromagnetically tight only against external electromagnetic effects, induced from the environment

9. The primary goal of an EFM is to verify the electrical interfaces between different satellite units

7. Spare CPU capacity in the OBSW scheduling is typically reserved as contingency for

6. The OBSW's interaction with ground control primarily involves:

7. In case of detected problems passed up to the main FDIR module, failure isolation and recovery should NOT:

7. During system initialization, the OBSW kernel parses the:

8. Which UML diagram illustrates the states of system components and the transitions between them?

What is a key advantage of using data buses over point-to-point conec. for connec multiple pieces of equip. to the OBC?

How is the selection between the nominal and redundant power supply unit typically managed?

7. The primary driver for onboard task scheduling is usually to achieve the appropriate:

6. All telecommands received from the ground are treated with the same priority

5. What is a key role of the Operating System (OS) and drivers layer in OBSW?

3. What is the direction of telecommands with respect to the spacecraft and the transponder interface?

7. FDIR functionality is implemented:

1. The HAL/S programming language included features for real-time processing control and was used for the Space Shuttle

2. What type of memory is used for the boot loader and a reference image of the onboard software?

6. For each predefined PUS service, the OBSW needs a:

1. RISC processors require more low-level instructionsthan CISC processors to perform a certain operation

8. UML is primarily used for:

7. OBSW internal variables reported via the SIF can include:

9. The main branches of the classic V-model for development and verification are:

3. How are High Priority Commands identified by the CCSDS processor for routing to the CPDU?

5. What is the main purpose of equipment handlers within the OBSW?

1. Magnetic core memory is volatile, meaning it loses its data when power is removed

1. The transition toward SoC. des. means processor designs are becoming less integ. and spreading across multiple chips

3. What is the primary use of a Joint Test Action Group (JTAG) interface?

7. FDIR functionality only focuses on hardware failures, not software anomalies.

2. What feature of SpaceWire allows for extremely high data rates?

9. The V-model dictates that software testing should only occur after the entire software implementation is complete

8. What is the primary output of the OBSW Functional Analysis?

What type of encoding does CAN-Bus utilise to enhance message compactness and robustness?

6. X-band and Ka-band are preferred for science data due to higher bandwidth capabilities.

2. For what was MIL-STD-1553B initially designed?

5. Equipment handlers abstract the specific details of hardware interfaces from the rest of the OBSW.

8. Software implementation and coding should be independent of the software design.

8. For satellite OBSW, a critical consideration in design is:

The connectors use short, flexible wiring to prevent solder stress from launcher-induced vibrations.

7. The top-level FDIR module acts as the overall health monitor and recovery action controller.

SIF stub module in the OBSW can serve for health chec until shortly bef. launch via S/C umbilical conn. at the launch s.

3. What is an example of a standard serial interface often used as a debug interface?

3. What is the primary purpose of the Command Pulse Decoding Unit (CPDU)?

4. What can high clock frequencies in OBCs and modern bus interfaces lead to?

1. System-on-Chip (SoC) designs integrate multipleprocessing cores on a single chip

4. Processors are typically found in other S/C instruments such as navigation receivers or star trackers.

5. Which of the following is a primary function of onboard software ?

8. During which phase of S/C development is a detailed definition of all onboard functions worked out?

9: Match:Memorize

6. On the Telecommand (TC) side, the OBSW is involved in:

9. What is a primary purpose of a Functional Verification Bench (FVB)?

4. Flash memory is good for usage in space

1. What architecture was selected by ESA as a baseline?

4. What is an important aspect related to longer lines between chips on a PCB within an OBC?

8. The next step after defining the OBSW Function Tree is:

9. What is a key aspect tested on a Hybrid System Testbed (STB) for the first time?

3. What is the primary purpose of debug and service interfaces on the OBC?

5. How does the OBSW application layer typically interact with equipment?

3. What is the primary role of the transponder interface in relation to the OBC?

Match: Memorize

Match: Memorise

6. The Packet Utilization Standard (PUS) primarily defines:

1. What programming language was used for the Onboard Software (OBSW) of the Gemini missions?

1.MIL-STD-1750 def. a 16-b micropr. architctr. What was the prim. applic. area for processors compliant with this stand?

8. Which of the following is NOT a key aspect of detailed OBSW requirements specification?

9. Housekeeping telemetry is only generated when a specific request is received from the ground

1. What characteristic of the RCA 1802 microprocessor made it suitable for the Galileo mission?

9. To verify detailed spacecraft requirements, what must be available according to the V-model?

3. How are reconfiguration units typically implemented?

9. What kind of tests are "Controller in the Loop" tests typically performed on?

6. High Priority Commands (HPC) of highest class 1 are used for:

4. Radiation hardened chips are required starting at the OBC breadboard models.

6. On the Telemetry (TM) side, the OBSW is involved in

3. What is the primary purpose of reconfiguration units within the OBC?

2. How many Remote Terminals (RT) can a MIL bus have, in addition to a Bus Controller (BC)

OBC cores depend: .t. required authenticn functions, perfor. require.s, memory equip., high prio line (HPC), firmware

4. Technology Readiness Level (TRL) 1, according to the NASA classification, requires the most maturity

5. Which layer of the OBSW typically contains drivers for I/O channels like UART?

7. Through the SIF and dedicated analysis tools, it is possible to check:

What does SoC mean?

9. What is a significant effort required for an STB configuration where the OBC's I/O interfaces are directly tested?

6. After identification, HPCs are typically routed to the:

Match: Memorize

2. How is the CAN-Bus physically implemented?

This is true: memorize

1. What voting scheme was applied when all four computers were running in the Shuttle Data Processing System (DPS)?